This is a utility that monitors the state of the iPAQ.
It could easily be adpated to monitor state for other
devices.

It does this by saving all the registers periodically.
The user gets to define the period to the nearest ms.
Currently it only saves the differences for a maximum
of 100 time deltas.
eg. if I say to monitor every 1000ms I will get
100s worht of data. The monitoring will cease when 100th
period is reached and the details will be written to
a file (regdiff.txt).

Dirk 19-Dec-2000
<dirk.vanhennekeler@compaq.com>

----
I've included a snipit of the regdiff.txt file here.





ALL REGISTERS: START

--------------------

Ticks=12294531l



UDC Registers (Serial Port 0) (# of regs=13)

0x80000000: UDCCR = 0x00000040 (UDC control register)

0x80000004: UDCAR = 0x00000002 (UDC address register)

0x80000008: UDCOMP = 0x0000003F (UCD OUT max packet register)

0x8000000C: UDCIMP = 0x00000006 (UDC IN max packet register)

0x80000010: UDCCS0 = 0x00000000 (UDC endpoint 0 control/status register)

0x80000014: UDCCS1 = 0x00000000 (UDC endpoint 1 (out) control/status register)

0x80000018: UDCCS2 = 0x00000001 (UDC endpoint 2 (in) control/status register)

0x8000001C: UDCD0 = 0x00000021 (UDC endpoint 0 data register)

0x80000020: UDCWC = 0x00000000 (UDC endpoint 0 write count register)

0x80000024: = N/A (Reserved)

0x80000028: UDCDR = 0x00000025 (UDC transmit/receive data register (FIFOs))

0x8000002C: = N/A (Reserved)

0x80000030: UDCSR = 0x00000000 (UDC status/interrupt register)



UART Registers (Serial Port 1) (# of regs=10)

0x80010000: UTCR0 = 0x00000008 (UART control register 0)

0x80010004: UTCR1 = 0x00000000 (UART control register 1)

0x80010008: UTCR2 = 0x00000001 (UART control register 2)

0x8001000C: UTCR3 = 0x0000000B (UART control register 3)

0x80010010: = N/A (Reserved)

0x80010014: UTDR = 0x00000030 (UART data register)

0x80010018: = N/A (Reserved)

0x8001001C: UTSR0 = 0x00000001 (UART status register 0)

0x80010020: UTSR1 = 0x00000004 (UART status register 1)

0x80010024: = N/A (Reserved)



GPCLK Registers (Serial Port 1) (# of regs=6)

0x80020060: GPCLKR0 = 0x00000000 (GPCLK control register 0)

0x80020064: = N/A (Reserved)

0x80020068: = N/A (Reserved)

0x8002006C: GPCLKR1 = 0x00000000 (GPCLK control register 1)

0x80020070: GPCLKR2 = 0x00000000 (GPCLK control register 2)

0x80020074: = N/A (Reserved)



ICP - UART Registers (Serial Port 2) (# of regs=10)

0x80030000: UTCR0 = 0x00000020 (UART control register 0)

0x80030004: UTCR1 = 0x00000002 (UART control register 1)

0x80030008: UTCR2 = 0x00000050 (UART control register 2)

0x8003000C: UTCR3 = 0x00000000 (UART control register 3)

0x80030010: = N/A (Reserved)

0x80030014: UTDR = 0x000000D1 (UART data register)

0x80030018: = N/A (Reserved)

0x8003001C: UTSR0 = 0x00000000 (UART status register 0)

0x80030020: UTSR1 = 0x00000004 (UART status register 1)

0x80030024: = N/A (Reserved)



ICP - HSSP Registers (Serial Port 2) (# of regs=7)

0x80040060: HSCR0 = 0x00000000 (HSSP control register 0)

0x80040064: HSCR1 = 0x00000000 (HSSP control register 1)

0x80040068: = N/A (Reserved)

0x8004006C: HSDR = 0x00000000 (HSSP data register)

0x80040070: = N/A (Reserved)

0x80040074: HSSR0 = 0x00000000 (HSSP control register 0)

0x80040078: HSSR1 = 0x00000000 (HSSP control register 1)



UART Registers (Serial Port 3) (# of regs=10)

0x80050000: UTCR0 = 0x00000000 (UART control register 0)

0x80050004: UTCR1 = 0x00000000 (UART control register 1)

0x80050008: UTCR2 = 0x00000000 (UART control register 2)

0x8005000C: UTCR3 = 0x00000000 (UART control register 3)

0x80050010: = N/A (Reserved)

0x80050014: UTDR = 0x0000009A (UART data register)

0x80050018: = N/A (Reserved)

0x8005001C: UTSR0 = 0x00000000 (UART status register 0)

0x80050020: UTSR1 = 0x00000004 (UART status register 1)

0x80050024: = N/A (Reserved)



MCP Registers (Serial Port 4) (# of regs=8)

0x80060000: MCCR0 = 0x00001006 (MCP control register 0)

0x80060004: = N/A (Reserved)

0x80060008: MCDR0 = 0x00000000 (MCP data register 0)

0x8006000C: MCDR1 = 0x00000000 (MCP data register 1)

0x80060010: MCDR2 = 0x00000000 (MCP data register 2)

0x80060014: = N/A (Reserved)

0x80060018: MCSR = 0x00001505 (MCP status register)

0x8006001C: = N/A (Reserved)



SSP Registers (serial port 4) (# of regs=7)

0x80060060: SSCR0 = 0x00001006 (SSP control register 0)

0x80060064: SSCR1 = 0x00000000 (SSP control register 1)

0x80060068: = N/A (Reserved)

0x8006006C: SDR = 0x00000000 (SSP data register)

0x80060070: = N/A (Reserved)

0x80060074: SSR = 0x00000000 (SSP control register 0)

0x80060078: = N/A (Reserved)



OS Timer Registers (# of regs=8)

0x90000000: OSMR0 = 0x976C4FAD (OS timer match regiser 0)

0x90000004: OSMR1 = 0x2BF698B1 (OS timer match regiser 1)

0x90000008: OSMR2 = 0xFC9D9D45 (OS timer match regiser 2)

0x9000000C: OSMR3 = 0x2E9FE38A (OS timer match regiser 3)

0x90000010: OSCR = 0x976C423E (OS timer counter register)

0x90000014: OSSR = 0x00000000 (OS timer status register)

0x90000018: OWER = 0x00000000 (OS timer watchdog register)

0x9000001C: OIER = 0x00000007 (OS timer interrupt enable register)



Real-Time Clock Registers (# of regs=4)

0x90010000: RTAR = 0x5ED1A21A (Real-time clock alarm)

0x90010004: RCNR = 0x5ECD73ED (Real-time clock count register)

0x90010008: RTTR = 0x00008000 (Real-time clock trim register)

0x90010010: RTSR = 0x0000000C (Real-time clock status register)



Power Manager Registers (# of regs=8)

0x90020000: PMCR = 0x00000000 (Power manager control register)

0x90020004: PSSR = 0x00000001 (Power manager sleep status register)

0x90020008: PSPR = 0x00000000 (Power manager scratch pad register)

0x9002000C: PWER = 0x80800003 (Power manager wakeup enable register)

0x90020010: PCFR = 0x00000001 (Power manager configuration register)

0x90020014: PPCR = 0x0000000A (Power manager PLL configuration register)

0x90020018: PGSR = 0x00000000 (Power manager GPIO sleep state register)

0x9002001C: POSR = 0x00000001 (Power manager oscillator status register)



Reset Controller Registers (# of regs=3)

0x90030000: RSRR = 0x00000000 (Reset controller software reset register)

0x90030004: PCSR = 0x00000000 (Reset controller status register)

0x90030008: = N/A (TUCR - reserved for test)



GPIO Registers (# of regs=8)

0x90040000: GPLR = 0x00A5FFFF (GPIO pin level register)

0x90040004: GPDR = 0x0401F3FC (GPIO pin direction register)

0x90040008: GPSR = 0x00000000 (GPIO pin output set register)

0x9004000C: GPCR = 0x00000000 (GPIO pin output clear register)

0x90040010: GRER = 0x0AD40001 (GPIO rising-edge register)

0x90040014: GFER = 0x0AE40001 (GPIO falling-edge register)

0x90040018: GEDR = 0x00000000 (GPIO edge detect status register)

0x9004001C: GAFR = 0x000803FC (GPIO alternate function register)



Interrupt Controller Registers (# of regs=6)

0x90050000: ICIP = 0x00000000 (Interrupt controller pin level register)

0x90050004: ICMR = 0xDF02A801 (Interrupt controller pin direction register)

0x90050008: ICLR = 0x00000000 (Interrupt controller pin output set register)

0x9005000C: ICCR = 0x00000001 (Interrupt controller pin output clear register)

0x90050010: ICFP = 0x00000000 (Interrupt controller rising-edge register)

0x90050020: ICPR = 0x00001000 (Interrupt controller falling-edge register)



PPC Registers (# of regs=7)

0x90060000: PPDR = 0x003D5000 (PPC pin direction register)

0x90060004: PPSR = 0x0001BEFF (PPC pin state register)

0x90060008: PPAR = 0x00000000 (PPC pin pin assignment register)

0x9006000C: PSDR = 0x003FB000 (PPC sleep mode direction register)

0x90060010: PPFR = 0x0003C000 (PPC pin flag register)

0x90060028: HSCR2 = 0x000C0000 (HSSP control register 2)

0x90060030: MCCR1 = 0x0003C000 (MCP control register 1)



Memory Controller Registers (# of regs=13)

0xA0000000: MDCNFG = 0xF3536257 (DRAM configuration register)

0xA0000004: MDCAS00 = 0xAAAAAA9F (DRAM CAS waveform rotate register 0 for DRAM bank pair 0/1)

0xA0000008: MDCAS01 = 0xAAAAAAAA (DRAM CAS waveform rotate register 1 for DRAM bank pair 0/1)

0xA000000C: MDCAS02 = 0xAAAAAAAA (DRAM CAS waveform rotate register 2 for DRAM bank pair 0/1)

0xA0000010: MSC0 = 0x43724372 (Static memory control register 0)

0xA0000014: MSC1 = 0x2221E4FD (Static memory control register 1)

0xA0000018: MECR = 0x194A194A (Expansion bus configuration register)

0xA000001C: MDREFR = 0x30340325 (DRAM refresh control register)

0xA0000020: MDCAS20 = 0x83C1E01F (DRAM CAS waveform rotate register 0 for DRAM bank pair 2/3)

0xA0000024: MDCAS21 = 0x3C1E0F07 (DRAM CAS waveform rotate register 1 for DRAM bank pair 2/3)

0xA0000028: MDCAS22 = 0xFFFFF078 (DRAM CAS waveform rotate register 2 for DRAM bank pair 2/3)

0xA000002C: MSC2 = 0x42314449 (Static memory control register 2)

0xA0000030: SMCNFG = 0xA040A040 (SMROM configuration register)



DMA Controller Registers (# of regs=48)

0xB0000000: DDAR0 = 0x80000A15 (DMA device address register 0)

0xB0000004: DCSR0 = 0x00000011 (DMA control/status register 0 - write ones to set)

0xB0000008: DCSR0 = 0x00000011 (Write ones to clear)

0xB000000C: DCSR0 = 0x00000011 (Read only)

0xB0000010: DBSA0 = 0xC0038000 (DMA buffer A start address 0)

0xB0000014: DBTA0 = 0x00000080 (DMA buffer A transfer count 0)

0xB0000018: DBSB0 = 0xC0038080 (DMA buffer B start address 0)

0xB000001C: DBTB0 = 0x00000080 (DMA buffer B transfer count 0)

0xB0000020: DDAR1 = 0x80000A04 (DMA device address register 1)

0xB0000024: DCSR1 = 0x00000000 (DMA control/status register 1 - write ones to set)

0xB0000028: DCSR1 = 0x00000000 (Write ones to clear)

0xB000002C: DCSR1 = 0x00000000 (Read only)

0xB0000030: DBSA1 = 0xC0038100 (DMA buffer A start address 1)

0xB0000034: DBTA1 = 0x00000010 (DMA buffer A transfer count 1)

0xB0000038: DBSB1 = 0xC0038180 (DMA buffer B start address 1)

0xB000003C: DBTB1 = 0x00000010 (DMA buffer B transfer count 1)

0xB0000040: DDAR2 = 0x0020A0FF (DMA device address register 2)

0xB0000044: DCSR2 = 0x00000000 (DMA control/status register 2 - write ones to set)

0xB0000048: DCSR2 = 0x00000000 (Write ones to clear)

0xB000004C: DCSR2 = 0x00000000 (Read only)

0xB0000050: DBSA2 = 0x0020A0FF (DMA buffer A start address 2)

0xB0000054: DBTA2 = 0x000000FF (DMA buffer A transfer count 2)

0xB0000058: DBSB2 = 0x0020A0FF (DMA buffer B start address 2)

0xB000005C: DBTB2 = 0x000000FF (DMA buffer B transfer count 2)

0xB0000060: DDAR3 = 0x000000FF (DMA device address register 3)

0xB0000064: DCSR3 = 0x00000000 (DMA control/status register 3 - write ones to set)

0xB0000068: DCSR3 = 0x00000000 (Write ones to clear)

0xB000006C: DCSR3 = 0x00000000 (Read only)

0xB0000070: DBSA3 = 0x0020A0FF (DMA buffer A start address 3)

0xB0000074: DBTA3 = 0x000000FF (DMA buffer A transfer count 3)

0xB0000078: DBSB3 = 0x0020A0FF (DMA buffer B start address 3)

0xB000007C: DBTB3 = 0x000000FF (DMA buffer B transfer count 3)

0xB0000080: DDAR4 = 0x81C01BF9 (DMA device address register 4)

0xB0000084: DCSR4 = 0x00000000 (DMA control/status register 4 - write ones to set)

0xB0000088: DCSR4 = 0x00000000 (Write ones to clear)

0xB000008C: DCSR4 = 0x00000000 (Read only)

0xB0000090: DBSA4 = 0xC0005000 (DMA buffer A start address 4)

0xB0000094: DBTA4 = 0x00001800 (DMA buffer A transfer count 4)

0xB0000098: DBSB4 = 0xC0006800 (DMA buffer B start address 4)

0xB000009C: DBTB4 = 0x00001800 (DMA buffer B transfer count 4)

0xB00000A0: DDAR5 = 0x81C01BE8 (DMA device address register 5)

0xB00000A4: DCSR5 = 0x00000000 (DMA control/status register 5 - write ones to set)

0xB00000A8: DCSR5 = 0x00000000 (Write ones to clear)

0xB00000AC: DCSR5 = 0x00000000 (Read only)

0xB00000B0: DBSA5 = 0xC0003800 (DMA buffer A start address 5)

0xB00000B4: DBTA5 = 0x00000000 (DMA buffer A transfer count 5)

0xB00000B8: DBSB5 = 0xC0005000 (DMA buffer B start address 5)

0xB00000BC: DBTB5 = 0x00000000 (DMA buffer B transfer count 5)



LCD Controller Registers (# of regs=11)

0xB0100000: LCCR0 = 0x00000081 (LCD controller control register 0)

0xB0100004: LCSR = 0x00000002 (LCD controller status register)

0xB0100008: = N/A (Reserved)

0xB010000C: = N/A (Reserved)

0xB0100010: DBAR1 = 0xC0050000 (DMA channel 1 base address register)

0xB0100014: DCAR1 = 0xC006CAE0 (DMA channel 1 current address register)

0xB0100018: DBAR2 = 0xFF9FBFF0 (DMA channel 2 base address register)

0xB010001C: DCAR2 = 0xFF9FBFF0 (DMA channel 2 current address register)

0xB0100020: LCCR1 = 0x0B100930 (LCD controller control register 1)

0xB0100024: LCCR2 = 0x0A0108F0 (LCD controller control register 2)

0xB0100028: LCCR3 = 0x00300010 (LCD controller control register 3)



Extended GPIO Registers (# of regs=2)

0xC0020000: = N/A (Reserved)

0xC0020300: EGPIO = 0xBFB32000 (Extended GPIO)

ALL REGISTERS: FINISH

---------------------



----------------------------------

Ticks(old)=12294531l, Ticks(new)=12294652l, delta=121l (12l ms)

0x90000000: OSMR0 [was=0x976C4FAD, now=0x977323CA] (OS timer match regiser 0)

0x90000010: OSCR [was=0x976C423E, now=0x97731D82] (OS timer counter register)

0x90010004: RCNR [was=0x5ECD73ED, now=0x5ECD73EE] (Real-time clock count register)

0x90040000: GPLR [was=0x00A5FFFF, now=0x00A5FC03] (GPIO pin level register)

0x90060004: PPSR [was=0x0001BEFF, now=0x0001B700] (PPC pin state register)

0xB0100014: DCAR1 [was=0xC006CAE0, now=0xC0050050] (DMA channel 1 current address register)

----------------------------------

Ticks(old)=12294652l, Ticks(new)=12294753l, delta=101l (10l ms)

0x80010014: UTDR [was=0x00000030, now=0x0000000D] (UART data register)

0x90000000: OSMR0 [was=0x977323CA, now=0x9778E8C7] (OS timer match regiser 0)

0x90000010: OSCR [was=0x97731D82, now=0x9778E318] (OS timer counter register)

0x90060004: PPSR [was=0x0001B700, now=0x0001BE18] (PPC pin state register)

0xB0100014: DCAR1 [was=0xC0050050, now=0xC00551F0] (DMA channel 1 current address register)

----------------------------------

Ticks(old)=12294753l, Ticks(new)=12294854l, delta=101l (10l ms)

0x90000000: OSMR0 [was=0x9778E8C7, now=0x977EA5CD] (OS timer match regiser 0)

0x90000010: OSCR [was=0x9778E318, now=0x977EA0C1] (OS timer counter register)

0x90040000: GPLR [was=0x00A5FC03, now=0x00ADFFFF] (GPIO pin level register)

0x90060004: PPSR [was=0x0001BE18, now=0x0001BFFF] (PPC pin state register)

0xB0100014: DCAR1 [was=0xC00551F0, now=0xC0059E60] (DMA channel 1 current address register)